Digital Filters in AT6000 FPGAs - Application Note

Introduction This application note describes the implementation of digital filters in the Atmel AT6000-series FPGAs. Bit-serial digital signal processing is used to construct efficient Finite Impulse Response (FIR) and Infinite Impulse Response (IIR) filter macros that can be cascaded to create higher-order functions. We will briefly review the techniques first introduced in the application note: FPGAbased FIR Filter using Bit-Serial Digital Signal Processing. Several reference designs are included that demonstrate specific filters and how they are constructed. These filters are available as hard macros that can be used in DSP designs. The implementation details of these filters along with performance, sample-rates, numeric precision, and device utilization are presented. The digital filter macros are variable coefficient filters, where the characteristics of the filter can be modified in real-time via partial dynamic reconf iguration of the FPGA.